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A Simulation Technique in Microprogram ValidationThis paper presents the method used in validating the microprogram of the Brassboard Fault-Tolerant Spaceborne Computer (BFTSC) built for the Air Force Space and Missile Systems Organization. The design of the microcode Interpretive Computer Simulation (ICS) validation tool for the BFTSC is described in detail. A summary of the results found in validating the microcode for the BFTSC is presented, along with extended uses of the microcode ICS.
Document ID
19780028758
Acquisition Source
Headquarters
Document Type
Conference Paper
Authors
Richard Wheatley (Logicon San Pedro, California, United States)
Date Acquired
August 9, 2013
Publication Date
October 31, 1977
Publication Information
Publication: AIAA/NASA/IEEE/ACM Computers in Aerospace Conference, Los Angeles, Calif., October 31-November 2, 1977: A Collection of Technical Papers
Publisher: American Institute of Aeronautics and Astronautics
DOI: 10.2514/6.1977-1400
Subject Category
Computer Programming and Software
Report/Patent Number
AIAA-77-1400
Meeting Information
Meeting: AIAA/NASA/IEEE/ACM Computers in Aerospace Conference
Location: Los Angeles, CA
Country: US
Start Date: October 31, 1977
End Date: November 2, 1977
Sponsors: Association for Computing Machinery, American Institute of Aeronautics and Astronautics, Institute of Electrical and Electronics Engineers, National Aeronautics and Space Administration
Accession Number
78A12667
Distribution Limits
Public
Copyright
Portions of document may include copyright protected material.
Technical Review
Single Expert
Keywords
Information System
Computer Systems
FORTRAN
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IDRelationTitle19780028742Collected WorksAIAA/NASA/IEEE/ACM Computers in Aerospace Conference, Los Angeles, Calif., October 31-November 2, 1977: A Collection of Technical Papers
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