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Real-time digital integratorField programmable logic array (FPLA) is used to make 3-bit arithmetic logic unit (ALU) for large integrator that can be read and cleared while new data is added to begin new integral. Arrangement of device can provide for full carry/lookahead capability with minimum gate delays.
Document ID
19790000447
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Rubin, A. L. (Caltech)
Taylor, H. (Caltech)
Wallis, D. E. (Caltech)
Date Acquired
August 10, 2013
Publication Date
June 1, 1980
Publication Information
Publication: NASA Tech Briefs
Volume: 4
Issue: 4
ISSN: 0145-319X
Subject Category
Electronic Components And Circuits
Report/Patent Number
NPO-14530
Report Number: NPO-14530
ISSN: 0145-319X
Accession Number
79B10447
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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