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Complementary DMOS-VMOS integrated circuit structureA high speed CMOS formed on a single semiconductor substrate includes a DMOS having an asymmetric channel and a VMOS with a relatively short channel length. The short channel length of the VMOS is achieved by forming a double diffusion along one edge of a V groove, or ion implanting boron into the apex of the V groove and diffusing a single layer to a relatively deep depth along both edges of the groove.
Document ID
19790004150
Acquisition Source
Legacy CDMS
Document Type
Other - Patent
Authors
Jhabvala, M. O.
(NASA Goddard Space Flight Center Greenbelt, MD, United States)
Date Acquired
September 3, 2013
Publication Date
October 10, 1978
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
Patent Number: NASA-CASE-GSC-12190-1
Patent Number: US-PATENT-4,119,996
Patent Application Number: US-PATENT-APPL-SN-817413
Accession Number
79N12321
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
NASA-CASE-GSC-12190-1|US-PATENT-4,119,996
Patent Application
US-PATENT-APPL-SN-817413
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