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Module failure isolation circuit for paralleled invertersA module failure isolation circuit is described which senses and averages the collector current of each paralled inverter power transistor and compares the collector current of each power transistor the average collector current of all power transistors to determine when the sensed collector current of a power transistor in any one inverter falls below a predetermined ratio of the average collector current. The module associated with any transistor that fails to maintain a current level above the predetermined radio of the average collector current is then shut off. A separate circuit detects when there is no load, or a light load, to inhibit operation of the isolation circuit during no load or light load conditions.
Document ID
19790016083
Acquisition Source
Legacy CDMS
Document Type
Other - Patent
Authors
Nagano, S.
(JPL)
Date Acquired
September 4, 2013
Publication Date
April 17, 1979
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
Patent Number: US-PATENT-4,150,425
Patent Number: NASA-CASE-NPO-14000-1
Patent Application Number: US-PATENT-APPL-SN-876431
Accession Number
79N24254
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
US-PATENT-4,150,425|NASA-CASE-NPO-14000-1
Patent Application
US-PATENT-APPL-SN-876431
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