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The 10 to the 8th power bit solid state spacecraft data recorderThe results are summarized of a program to demonstrate the feasibility of Bubble Domain Memory Technology as a mass memory medium for spacecraft applications. The design, fabrication and test of a partially populated 10 to the 8th power Bit Data Recorder using 100 Kbit serial bubble memory chips is described. Design tradeoffs, design approach and performance are discussed. This effort resulted in a 10 to the 8th power bit recorder with a volume of 858.6 cu in and a weight of 47.2 pounds. The recorder is plug reconfigurable, having the capability of operating as one, two or four independent serial channel recorders or as a single sixteen bit byte parallel input recorder. Data rates up to 1.2 Mb/s in a serial mode and 2.4 Mb/s in a parallel mode may be supported. Fabrication and test of the recorder demonstrated the basic feasibility of Bubble Domain Memory technology for such applications. Test results indicate the need for improvement in memory element operating temperature range and detector performance.
Document ID
19800002890
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Murray, G. W.
(Rockwell International Corp. Anaheim, CA, United States)
Bohning, O. D.
(Rockwell International Corp. Anaheim, CA, United States)
Kinoshita, R. Y.
(Rockwell International Corp. Anaheim, CA, United States)
Becker, F. J.
(Rockwell International Corp. Anaheim, CA, United States)
Date Acquired
September 4, 2013
Publication Date
October 1, 1979
Publication Information
Publisher: NASA
Subject Category
Spacecraft Instrumentation
Report/Patent Number
NASA-CR-3182
C78-1151.1/201
Report Number: NASA-CR-3182
Report Number: C78-1151.1/201
Accession Number
80N11136
Funding Number(s)
CONTRACT_GRANT: NAS1-14174
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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