Analysis of first and second order binary quantized digital phase-locked loops for ideal and white Gaussian noise inputs

Specific configurations of first and second order all digital phase locked loops are analyzed for both ideal and additive white gaussian noise inputs. In addition, a design for a hardware digital phase locked loop capable of either first or second order operation is presented along with appropriate experimental data obtained from testing of the hardware loop. All parameters chosen for the analysis and the design of the digital phase locked loop are consistent with an application to an Omega navigation receiver although neither the analysis nor the design are limited to this application.