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Microprocessor utilization in satellite-borne packet switchingThe application of a bit slice microprocessor to a satellite-borne packet switch, serving geographically distributed users, is discussed. A system architecture that employs this packet switch is examined, and the performance of the switch is evaluated by obtaining an upper bound on the system throughput.
Document ID
19800043144
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Burnell, J. F. (Bell Telephone Laboratories, Inc. Whippany, N.J., United States)
Crist, S. C. (Bell Telephone Labs., Inc. Whippany, NJ, United States)
Arozullah, M. (Clarkson College of Technology Potsdam, N.Y., United States)
Date Acquired
August 10, 2013
Publication Date
February 1, 1980
Publication Information
Publication: IEEE Transactions on Computers
Volume: C-29
Subject Category
Communications And Radar
Accession Number
80A27314
Funding Number(s)
CONTRACT_GRANT: NSG-3191
Distribution Limits
Public
Copyright
Other

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