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Testing Patchboard Connections AutomaticallyComputer controlled patchboard verifier sequentially scans each pin on patchboard and notes its connection, if any, to all of other pins. Connection pattern is automatically compared with one known to be correct. Entire patchboard of 1,632 connections can be verified in about a minute.
Document ID
19810000129
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Brunson, J. W. (IN-TEL-12)
Date Acquired
August 11, 2013
Publication Date
November 1, 1982
Publication Information
Publication: NASA Tech Briefs
Volume: 6
Issue: 2
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
KSC-11065
Report Number: KSC-11065
ISSN: 0145-319X
Accession Number
81B10129
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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