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Redundant operation of counter modulesA technique for the redundant operation of counter modules is described. Redundant operation is maintained by detecting the zero state of each counter and clearing the other to that state, thus periodically resynchronizing the counters, and obtaining an output from both counters through AC coupled diode-OR gates. Redundant operation of counter flip flops is maintained in a similar manner, and synchronous operation of redundant squarewave clock generators of the feedback type is effected by connecting together the feedback inputs of the squarewave generators through a coupling resistor, and obtaining an output from both generators through AC coupled diode-OR gates.
Document ID
19810007191
Acquisition Source
Legacy CDMS
Document Type
Other - Patent
Authors
Nagano, S.
(JPL California Inst. of Tech., Pasadena, United States)
Date Acquired
September 4, 2013
Publication Date
July 15, 1980
Subject Category
Computer Operations And Hardware
Report/Patent Number
Patent Number: NASA-CASE-NPO-14167-1
Patent Number: US-PATENT-4,213,064
Patent Number: NASA-CASE-NPO-14169-1
Patent Number: NASA-CASE-NPO-14162-1
Patent Application Number: US-PATENT-APPL-SN-893903
Accession Number
81N15706
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
NASA-CASE-NPO-14167-1|US-PATENT-4,213,064|NASA-CASE-NPO-14169-1|NASA-CASE-NPO-14162-1
Patent Application
US-PATENT-APPL-SN-893903
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