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Development and fabrication of a solar cell junction processing systemModifications to the ground plane, to insure a good electrical return path during the pulse discharge, were made using a ring of beryllium copper finger stock attached to the underside of the aluminum ground plate. Experiments on annealing of wafers with ion implantation damage continued. The entire surface of 100 mm diameter wafers were annealed by one pulse for the standard implant (10 keV, phosphorus, 2x10 to the 15th power ions/sq cm). While samples are being fabricated into solar cells for electrical characterization, work is continuing on improvement of the electron beam uniformity and the optimization of the diode parameters. The engineering design was completed and the manufacturing detail drawings were released for fabrication. Assembly of the subcomponents for the exit and entrance locks is almost complete. These components include the cassettes, the indexing mechanisms, main doors, and wafer carrier transfer modules. The 'Y' track and three phase transition track sections are under final assembly and test.
Document ID
19820002625
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Giesling, R.
(California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
September 4, 2013
Publication Date
July 1, 1981
Subject Category
Energy Production And Conversion
Report/Patent Number
JPL-9950-585
QPR-6
NASA-CR-163768
DOE/JPL-955648-81/6
Report Number: JPL-9950-585
Report Number: QPR-6
Report Number: NASA-CR-163768
Report Number: DOE/JPL-955648-81/6
Accession Number
82N10498
Funding Number(s)
CONTRACT_GRANT: NAS7-100
CONTRACT_GRANT: JPL-955640
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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