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Method for sequentially processing a multi-level interconnect circuit in a vacuum chamberThe processing of wafer devices to form multilevel interconnects for microelectronic circuits is described. The method is directed to performing the sequential steps of etching the via, removing the photo resist pattern, back sputtering the entire wafer surface and depositing the next layer of interconnect material under common vacuum conditions without exposure to atmospheric conditions. Apparatus for performing the method includes a vacuum system having a vacuum chamber in which wafers are processed on rotating turntables. The vacuum chamber is provided with an RF sputtering system and a DC magnetron sputtering system. A gas inlet is provided in the chamber for the introduction of various gases to the vacuum chamber and the creation of various gas plasma during the sputtering steps.
Document ID
19820025758
Acquisition Source
Legacy CDMS
Document Type
Other - Patent Application
Authors
Routh, D. E.
(NASA Marshall Space Flight Center Huntsville, AL, United States)
Sharma, G. C.
(Sharma and Associates)
Date Acquired
September 4, 2013
Publication Date
August 19, 1982
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
Patent Number: NASA-CASE-MFS-15670-1
Patent Application Number: US-PATENT-APPL-SN-409679
Accession Number
82N33634
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
NASA-CASE-MFS-15670-1
Patent Application
US-PATENT-APPL-SN-409679
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