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Hardware Fault Simulator Generates Test Vectors For Complex IC'sReport describes technique using fault simulator implemented entirely in hardware to generate and optimize test vectors for microprocessor. Hardware fault simulator approach reduces test time, while maintaining high reliability in detecting faults.
Document ID
19830000538
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Timoc, C. C. (CALTECH)
Hess, L. M. (CALTECH)
Stott, F. R. (CALTECH)
Date Acquired
August 11, 2013
Publication Date
November 1, 1984
Publication Information
Publication: NASA Tech Briefs
Volume: 8
Issue: 2
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
Report Number: NPO-15362
ISSN: 0145-319X
NPO-15362
Accession Number
83B10538
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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