A basic design fault in ceramic flat packs

Recent moisture resistance tests of various multilayer top brazed ceramic flat packs and leaded and unleaded chip carriers has revealed a serious design defect. These packages, which utilize a tungsten interconnect system, in the presence of high humidity, suffer a galvanic corrosion which anodically consumes the tungsten. This process can continue until the package suffers an open circuit. The test results indicate that the lead plating system does not adequately seal off the interface area where the tungsten stripe egresses from the inside of the package. Leaded and leadless chip carrier packages were also subjected to the moisture resistance test. The familiar red and green corrosion products were visible after the test was completed. Careful sectioning of the chip carriers has revealed that the tungsten interconnect stripe instead of exiting under the castellations, exits at the top of the castellation and is thus vulnerable to the attack of moisture. These basic design faults severely impact the reliability of these packages.