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Electron lithography STAR design guidelines. Part 3: The mosaic transistor array applied to custom microprocessors. Part 4: Stores logic arrays, SLAs implemented with clocked CMOSThe Mosaic Transistor Array is an extension of the STAR system developed by NASA which has dedicated field cells designed to be specifically used in semicustom microprocessor applications. The Sandia radiation hard bulk CMOS process is utilized in order to satisfy the requirements of space flights. A design philosophy is developed which utilizes the strengths and recognizes the weaknesses of the Sandia process. A style of circuitry is developed which incorporates the low power and high drive capability of CMOS. In addition the density achieved is better than that for classic CMOS, although not as good as for NMOS. The basic logic functions for a data path are designed with compatible interface to the STAR grid system. In this manner either random logic or PLA type structures can be utilized for the control logic.
Document ID
19850023529
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Trotter, J. D.
(Mississippi State Univ. Mississippi State, MS, United States)
Date Acquired
September 5, 2013
Publication Date
August 31, 1982
Subject Category
Computer Operations And Hardware
Report/Patent Number
NAS 1.26:170767
MSSU-EIRS-EE-83-4-PT-4
NASA-CR-170767
MSSU-EIRS-EE-83-4-PT-3
Report Number: NAS 1.26:170767
Report Number: MSSU-EIRS-EE-83-4-PT-4
Report Number: NASA-CR-170767
Report Number: MSSU-EIRS-EE-83-4-PT-3
Accession Number
85N31842
Funding Number(s)
CONTRACT_GRANT: NAS8-33450
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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