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PIFEX: An advanced programmable pipelined-image processorPIFEX is a pipelined-image processor being built in the JPL Robotics Lab. It will operate on digitized raster-scanned images (at 60 frames per second for images up to about 300 by 400 and at lesser rates for larger images), performing a variety of operations simultaneously under program control. It thus is a powerful, flexible tool for image processing and low-level computer vision. It also has applications in other two-dimensional problems such as route planning for obstacle avoidance and the numerical solution of two-dimensional partial differential equations (although its low numerical precision limits its use in the latter field). The concept and design of PIFEX are described herein, and some examples of its use are given.
Document ID
19860007472
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Gennery, D. B.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Wilcox, B.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
September 5, 2013
Publication Date
February 1, 1985
Subject Category
Computer Programming And Software
Report/Patent Number
NAS 1.26:176444
NASA-CR-176444
JPL-PUB-84-97
Report Number: NAS 1.26:176444
Report Number: NASA-CR-176444
Report Number: JPL-PUB-84-97
Accession Number
86N16942
Funding Number(s)
PROJECT: RTOP 506-54-65-24
CONTRACT_GRANT: NAS7-918
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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