NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
A parallel simulated annealing algorithm for standard cell placement on a hypercube computerA parallel version of a simulated annealing algorithm is presented which is targeted to run on a hypercube computer. A strategy for mapping the cells in a two dimensional area of a chip onto processors in an n-dimensional hypercube is proposed such that both small and large distance moves can be applied. Two types of moves are allowed: cell exchanges and cell displacements. The computation of the cost function in parallel among all the processors in the hypercube is described along with a distributed data structure that needs to be stored in the hypercube to support parallel cost evaluation. A novel tree broadcasting strategy is used extensively in the algorithm for updating cell locations in the parallel environment. Studies on the performance of the algorithm on example industrial circuits show that it is faster and gives better final placement results than the uniprocessor simulated annealing algorithms. An improved uniprocessor algorithm is proposed which is based on the improved results obtained from parallelization of the simulated annealing algorithm.
Document ID
19870017987
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Jones, Mark Howard
(Illinois Univ. Urbana, IL, United States)
Date Acquired
September 5, 2013
Publication Date
January 1, 1987
Subject Category
Computer Programming And Software
Report/Patent Number
NAS 1.26:180676
CSG-60
UILU-ENG-87-2209
NASA-CR-180676
Report Number: NAS 1.26:180676
Report Number: CSG-60
Report Number: UILU-ENG-87-2209
Report Number: NASA-CR-180676
Accession Number
87N27420
Funding Number(s)
CONTRACT_GRANT: NAG1-613
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
No Preview Available