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A comparison of the Cray-2 performance before and after the installation of memory pseudo-bankingA suite of 13 large Fortran benchmark codes were run on a Cray-2 configured with memory pseudo-banking circuits, and floating point operation rates were measured for each under a variety of system load configurations. These were compared with similar flop measurements taken on the same system before installation of the pseudo-banking. A useful memory access efficiency parameter was defined and calculated for both sets of performance rates, allowing a crude quantitative measure of the improvement in efficiency due to pseudo-banking. Programs were categorized as either highly scalar (S) or highly vectorized (V) and either memory-intensive or register-intensive, giving 4 categories: S-memory, S-register, V-memory, and V-register. Using flop rates as a simple quantifier of these 4 categories, a scatter plot of efficiency gain vs Mflops roughly illustrates the improvement in floating point processing speed due to pseudo-banking. On the Cray-2 system tested this improvement ranged from 1 percent for S-memory codes to about 12 percent for V-memory codes. No significant gains were made for V-register codes, which was to be expected.
Document ID
19880007903
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Schmickley, Ronald D.
(Sterling Federal Systems, Inc. Palo Alto, CA, United States)
Bailey, David H.
(Sterling Federal Systems, Inc. Palo Alto, CA, United States)
Date Acquired
September 5, 2013
Publication Date
June 16, 1987
Subject Category
Computer Operations And Hardware
Report/Patent Number
NAS 1.26:177462
NASA-CR-177462
TN-86-7104-939-13
Report Number: NAS 1.26:177462
Report Number: NASA-CR-177462
Report Number: TN-86-7104-939-13
Accession Number
88N17287
Funding Number(s)
CONTRACT_GRANT: NAS2-11555
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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