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Data traffic reduction schemes for sparse Cholesky factorizationsLoad distribution schemes are presented which minimize the total data traffic in the Cholesky factorization of dense and sparse, symmetric, positive definite matrices on multiprocessor systems with local and shared memory. The total data traffic in factoring an n x n sparse, symmetric, positive definite matrix representing an n-vertex regular 2-D grid graph using n (sup alpha), alpha is equal to or less than 1, processors are shown to be O(n(sup 1 + alpha/2)). It is O(n(sup 3/2)), when n (sup alpha), alpha is equal to or greater than 1, processors are used. Under the conditions of uniform load distribution, these results are shown to be asymptotically optimal. The schemes allow efficient use of up to O(n) processors before the total data traffic reaches the maximum value of O(n(sup 3/2)). The partitioning employed within the scheme, allows a better utilization of the data accessed from shared memory than those of previously published methods.
Document ID
19880011447
Acquisition Source
Legacy CDMS
Document Type
Preprint (Draft being sent to journal)
Authors
Naik, Vijay K.
(NASA Langley Research Center Hampton, VA, United States)
Patrick, Merrell L.
(NASA Langley Research Center Hampton, VA, United States)
Date Acquired
September 5, 2013
Publication Date
February 1, 1988
Subject Category
Mathematical And Computer Sciences (General)
Report/Patent Number
NASA-CR-181626
ICASE-88-14
NAS 1.26:181626
Report Number: NASA-CR-181626
Report Number: ICASE-88-14
Report Number: NAS 1.26:181626
Accession Number
88N20831
Funding Number(s)
CONTRACT_GRANT: NAS1-18107
PROJECT: RTOP 505-90-21-01
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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