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A scheme for supporting distributed data structures on multicomputersA data migration mechanism is proposed that allows an explicit and controlled mapping of data to memory. While read or write copies of each data element can be assigned to any processor's memory, longer term storage of each data element is assigned to a specific location in the memory of a particular processor. The proposed integration of a data migration scheme with a compiler is able to eliminate the migration of unneeded data that can occur in multiprocessor paging or caching. The overhead of adjudicating multiple concurrent writes to the same page or cache line is also eliminated. Data is presented that suggests that the scheme may be a pratical method for efficiently supporting data migration.
Document ID
19900008836
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Hiranandani, Seema
(Institute for Computer Applications in Science and Engineering Hampton, VA, United States)
Saltz, Joel
(Institute for Computer Applications in Science and Engineering Hampton, VA, United States)
Berryman, Harry
(Institute for Computer Applications in Science and Engineering Hampton, VA, United States)
Mehrotra, Piyush
(Institute for Computer Applications in Science and Engineering Hampton, VA, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1990
Subject Category
Mathematical And Computer Sciences (General)
Report/Patent Number
NASA-CR-181987
AD-A218782
NAS 1.26:181987
ICASE-IR-9
Report Number: NASA-CR-181987
Report Number: AD-A218782
Report Number: NAS 1.26:181987
Report Number: ICASE-IR-9
Accession Number
90N18152
Funding Number(s)
CONTRACT_GRANT: N00014-86-K-0310
CONTRACT_GRANT: NAS1-18605
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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