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Study on fault-tolerant processors for advanced launch systemIssues related to the reliability of a redundant system with large main memory are addressed. The Fault-Tolerant Processor (FTP) for the Advanced Launch System (ALS) is used as a basis for the presentation. When the system is free of latent faults, the probability of system crash due to multiple channel faults is shown to be insignificant even when voting on the outputs of computing channels is infrequent. Using channel error maskers (CEMs) is shown to improve reliability more effectively than increasing redundancy or the number of channels for applications with long mission times. Even without using a voter, most memory errors can be immediately corrected by those CEMs implemented with conventional coding techniques. In addition to their ability to enhance system reliability, CEMs (with a very low hardware overhead) can be used to dramatically reduce not only the need of memory realignment, but also the time required to realign channel memories in case, albeit rare, such a need arises. Using CEMs, two different schemes were developed to solve the memory realignment problem. In both schemes, most errors are corrected by CEMs, and the remaining errors are masked by a voter.
Document ID
19910003408
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Shin, Kang G.
(Michigan Univ. Ann Arbor, MI, United States)
Liu, Jyh-Charn
(Michigan Univ. Ann Arbor, MI, United States)
Date Acquired
September 6, 2013
Publication Date
November 27, 1990
Subject Category
Launch Vehicles And Space Vehicles
Report/Patent Number
NASA-CR-188955
NAS 1.26:188955
Report Number: NASA-CR-188955
Report Number: NAS 1.26:188955
Accession Number
91N12721
Funding Number(s)
CONTRACT_GRANT: NAG1-981
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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