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Machine-checked proofs of the design and implementation of a fault-tolerant circuitA formally verified implementation of the 'oral messages' algorithm of Pease, Shostak, and Lamport is described. An abstract implementation of the algorithm is verified to achieve interactive consistency in the presence of faults. This abstract characterization is then mapped down to a hardware level implementation which inherits the fault-tolerant characteristics of the abstract version. All steps in the proof were checked with the Boyer-Moore theorem prover. A significant results is the demonstration of a fault-tolerant device that is formally specified and whose implementation is proved correct with respect to this specification. A significant simplifying assumption is that the redundant processors behave synchronously. A mechanically checked proof that the oral messages algorithm is 'optimal' in the sense that no algorithm which achieves agreement via similar message passing can tolerate a larger proportion of faulty processor is also described.
Document ID
19910006439
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Bevier, William R.
(Computational Logic, Inc. Austin, TX, United States)
Young, William D.
(Computational Logic, Inc. Austin, TX, United States)
Date Acquired
September 6, 2013
Publication Date
November 1, 1990
Subject Category
Computer Programming And Software
Report/Patent Number
NAS 1.26:182099
NASA-CR-182099
Report Number: NAS 1.26:182099
Report Number: NASA-CR-182099
Accession Number
91N15752
Funding Number(s)
PROJECT: RTOP 505-66-21-01
CONTRACT_GRANT: NAS1-18878
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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