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The Design and Proof of Correctness of a Fault-Tolerant CircuitThe flowing achievements are presented in view graph form: (1) a formal statement of interactive consistency conditions in the Boyer-Moore logic; (2) a formal statement of the oral messages (OM) algorithm in the Boyer-Moore logic; (3) a mechanically checked proof that OM satisfies the interactive consistency conditions; (4) a mechanically checked proof of the optimality result--no algorithm can tolerate fewer faults than OM yet still achieve interactive consistency; (5) the use of OM in a functional specification for a fault-tolerant device; (6) a formal description of the design of the device; (7) a mechanically checked proof that the device design satisfies the specification; and (8) an implementation of the design in programmable logic arrays.
Document ID
19910008256
Acquisition Source
Legacy CDMS
Document Type
Poster
Authors
William R Bevier
(Computational Logic Austin, Texas, United States)
William D Young
(Computational Logic Austin, Texas, United States)
Date Acquired
September 6, 2013
Publication Date
November 1, 1990
Publication Information
Publication: NASA Formal Methods Workshop, 1990
Publisher: National Aeronautics and Space Administration
Subject Category
Electronics and Electrical Engineering
Report/Patent Number
NASA-CP-10052
Meeting Information
Meeting: NASA Formal Methods Workshop
Location: Hampton, VA
Country: US
Start Date: August 20, 1990
End Date: August 23, 1990
Sponsors: National Aeronautics and Space Administration
Accession Number
91N17569
Distribution Limits
Public
Copyright
Portions of document may include copyright protected material.
Technical Review
Single Expert
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