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A parallel algorithm for multi-level logic synthesis using the transduction methodThe Transduction Method has been shown to be a powerful tool in the optimization of multilevel networks. Many tools such as the SYLON synthesis system (X90), (CM89), (LM90) have been developed based on this method. A parallel implementation is presented of SYLON-XTRANS (XM89) on an eight processor Encore Multimax shared memory multiprocessor. It minimizes multilevel networks consisting of simple gates through parallel pruning, gate substitution, gate merging, generalized gate substitution, and gate input reduction. This implementation, called Parallel TRANSduction (PTRANS), also uses partitioning to break large circuits up and performs inter- and intra-partition dynamic load balancing. With this, good speedups and high processor efficiencies are achievable without sacrificing the resulting circuit quality.
Document ID
19920010819
Acquisition Source
Legacy CDMS
Document Type
Thesis/Dissertation
Authors
Lim, Chieng-Fai
(Illinois Univ. Urbana-Champaign, IL, United States)
Date Acquired
September 6, 2013
Publication Date
January 1, 1991
Subject Category
Computer Programming And Software
Report/Patent Number
NAS 1.26:189925
NASA-CR-189925
Report Number: NAS 1.26:189925
Report Number: NASA-CR-189925
Accession Number
92N20061
Funding Number(s)
CONTRACT_GRANT: NAG1-613
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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