Frame synchronization at 300 Mbps and beyond

A prototype frame synchronizer card and its supporting VLSI components under development at the Goddard Space Flight Center that will operate at a minimum 300 Mbps while providing a full suite of programmable functions are presented. Cumulative quality data generation, onboard self diagnostics, and status/control processing are all integrated in this single card design. Consideration is given to the telemetry frame synchronizer subsystem and high-rate frame synchronizer specifications.