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A multi-channel demultiplexer/demodulator architecture, simulation and implementationThe development of multichannel demultiplexer/demodulator is described in which the aim is to optimize bandwidth and hardware efficiency. Attention is given to the simulation and performance analysis of the proposed architectures for the demultiplexer and the demodulator. The project is presently in the test phase, and it is suggested that the present results demonstrate the feasibility and efficiency of incorporating on-board processing in commercial communications satellites.
Document ID
19920047271
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Cangiane, P. (NASA Lewis Research Center Cleveland, OH, United States)
Courtois, H. A. (NASA Lewis Research Center Cleveland, OH, United States)
Lee, D. D. (NASA Lewis Research Center Cleveland, OH, United States)
Sherry, M. A. (NASA Lewis Research Center Cleveland, OH, United States)
Spencer, M. E. (TRW Electronic Systems Group Redondo Beach, CA, United States)
Date Acquired
August 15, 2013
Publication Date
January 1, 1992
Subject Category
Communications And Radar
Report/Patent Number
AIAA PAPER 92-1972
Report Number: AIAA PAPER 92-1972
Meeting Information
Meeting: AIAA International Communication Satellite Systems Conference and Exhibit
Location: Washington, DC
Country: United States
Start Date: March 22, 1992
End Date: March 26, 1992
Accession Number
92A29895
Funding Number(s)
CONTRACT_GRANT: NAS3-25866
Distribution Limits
Public
Copyright
Other

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