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Verifying command sequences for satellite systemsWe present a formal basis for the design of a Checker used in validating safe schedules and in selecting error recovery schedules for satellite control systems. This design includes a high-level specification of Checker behavior and properties (called flight rules) of safe schedules. Specifications are written in Timed Linear Logic (TLL). Validation of schedules is performed in terms of real-time telemetry and deduction system proof rules. Telemetry (state information for satellite subsystems) serves as input to the Checker. Detection of violation of a flight rule by the Checker results in the selection of a contingency plan (error recovery schedule). The Checker is illustrated in terms of the TOPEX/Poseidon Oceanographic Satellite System.
Document ID
19930033330
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
External Source(s)
Authors
Peters, James F., III
(JPL Pasadena, CA, United States)
Ramanna, Sheela
(Idaho State Univ. Pocatello, United States)
Date Acquired
August 15, 2013
Publication Date
October 1, 1992
Publication Information
Publication: IEEE Aerospace and Electronic Systems Magazine
Volume: 7
Issue: 10
ISSN: 0885-8985
Subject Category
Space Communications, Spacecraft Communications, Command And Tracking
Report/Patent Number
ISSN: 0885-8985
Accession Number
93A17327
Distribution Limits
Public
Copyright
Other

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