NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Collections About News Help Login
Back to Results
A programmable architecture for CMOS sequential circuitsThis paper presents a programmable architecture for sequential pass transistor circuits. The resulting circuits are such that a state machine with N states and M output is constructed using a single layout replicated N + M times.
Document ID
19940004338
Acquisition Source
Legacy CDMS
Document Type
Conference Paper
Authors
Whitaker, S. (Idaho Univ. Moscow, ID, United States)
Maki, G. (Idaho Univ. Moscow, ID, United States)
Canaris, M. (Idaho Univ. Moscow, ID, United States)
Date Acquired
August 16, 2013
Publication Date
January 24, 1990
Publication Information
Publication: The First NASA Symposium on VLSI Design
Subject Category
Electronics And Electrical Engineering
Accession Number
94N71093
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

Available Downloads

There are no available downloads for this record.

Related Records

IDRelationTitle19940004319Collected WorksNASA SERC 1990 Symposium on VLSI Design
No Preview Available