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Verification of fault-tolerant clock synchronization systemsA critical function in a fault-tolerant computer architecture is the synchronization of the redundant computing elements. The synchronization algorithm must include safeguards to ensure that failed components do not corrupt the behavior of good clocks. Reasoning about fault-tolerant clock synchronization is difficult because of the possibility of subtle interactions involving failed components. Therefore, mechanical proof systems are used to ensure that the verification of the synchronization system is correct. In 1987, Schneider presented a general proof of correctness for several fault-tolerant clock synchronization algorithms. Subsequently, Shankar verified Schneider's proof by using the mechanical proof system EHDM. This proof ensures that any system satisfying its underlying assumptions will provide Byzantine fault-tolerant clock synchronization. The utility of Shankar's mechanization of Schneider's theory for the verification of clock synchronization systems is explored. Some limitations of Shankar's mechanically verified theory were encountered. With minor modifications to the theory, a mechanically checked proof is provided that removes these limitations. The revised theory also allows for proven recovery from transient faults. Use of the revised theory is illustrated with the verification of an abstract design of a clock synchronization system.
Document ID
19940012976
Acquisition Source
Legacy CDMS
Document Type
Thesis/Dissertation
Authors
Miner, Paul S.
(NASA Langley Research Center Hampton, VA, United States)
Date Acquired
September 6, 2013
Publication Date
November 1, 1993
Subject Category
Computer Systems
Report/Patent Number
L-17209
NAS 1.60:3349
NASA-TP-3349
Report Number: L-17209
Report Number: NAS 1.60:3349
Report Number: NASA-TP-3349
Accession Number
94N17449
Funding Number(s)
PROJECT: RTOP 505-64-50-03
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
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