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Method of implementing digital phase-locked loopsIn a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, or root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (BLT yields 0) and in a discrete-update formulation with arbitrary BLT. Deficiencies of the continuous-update approximation in large-BLT applications are avoided in the new discrete-update formulation. A new method for direct, transient-free acquisition with third- and fourth-order loops can improve the versatility and reliability of acquisition with such loops.
Document ID
19940024871
Acquisition Source
Headquarters
Document Type
Other - Patent Application
Authors
Stephens, Scott A.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Thomas, Jess Brooks, Jr.
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
September 6, 2013
Publication Date
October 13, 1993
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
NAS 1.71:NPO-18757-1-CU
Patent Application Number: US-PATENT-APPL-SN-141797
Patent Number: NASA-CASE-NPO-18757-1-CU
Report Number: NAS 1.71:NPO-18757-1-CU
Accession Number
94N29374
Funding Number(s)
CONTRACT_GRANT: NAS7-918
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
NASA-CASE-NPO-18757-1-CU
Patent Application
US-PATENT-APPL-SN-141797
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