NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Collections About News Help Login

Due to the lapse in federal government funding, NASA is not updating this website. We sincerely regret this inconvenience.

Back to Results
Design of a massively parallel computer using bit serial processing elementsA 1-bit serial processor designed for a parallel computer architecture is described. This processor is used to develop a massively parallel computational engine, with a single instruction-multiple data (SIMD) architecture. The computer is simulated and tested to verify its operation and to measure its performance for further development.
Document ID
19950015989
Acquisition Source
Legacy CDMS
Document Type
Contractor Report (CR)
Authors
Aburdene, Maurice F. (Bucknell Univ. Lewisburg, PA, United States)
Khouri, Kamal S. (Bucknell Univ. Lewisburg, PA, United States)
Piatt, Jason E. (Bucknell Univ. Lewisburg, PA, United States)
Zheng, Jianqing (Bucknell Univ. Lewisburg, PA, United States)
Date Acquired
September 6, 2013
Publication Date
January 24, 1995
Subject Category
Computer Systems
Report/Patent Number
NASA-CR-197365
NAS 1.26:197365
Report Number: NASA-CR-197365
Report Number: NAS 1.26:197365
Accession Number
95N22406
Funding Number(s)
CONTRACT_GRANT: NAG5-2509
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

Related Records

There are no records associated with this record.
No Preview Available