NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
A Low-Power High-Speed Smart Sensor Design for Space Exploration MissionsA low-power high-speed smart sensor system based on a large format active pixel sensor (APS) integrated with a programmable neural processor for space exploration missions is presented. The concept of building an advanced smart sensing system is demonstrated by a system-level microchip design that is composed with an APS sensor, a programmable neural processor, and an embedded microprocessor in a SOI CMOS technology. This ultra-fast smart sensor system-on-a-chip design mimics what is inherent in biological vision systems. Moreover, it is programmable and capable of performing ultra-fast machine vision processing in all levels such as image acquisition, image fusion, image analysis, scene interpretation, and control functions. The system provides about one tera-operation-per-second computing power which is a two order-of-magnitude increase over that of state-of-the-art microcomputers. Its high performance is due to massively parallel computing structures, high data throughput rates, fast learning capabilities, and advanced VLSI system-on-a-chip implementation.
Document ID
20000054879
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other
Authors
Fang, Wai-Chi
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA United States)
Date Acquired
September 7, 2013
Publication Date
January 1, 1997
Subject Category
Spacecraft Instrumentation And Astrionics
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
No Preview Available