Guidelines for Design and Test of a Built-In Self Test (BIST) Circuit For Space Radiation Studies of High-Speed IC Technologies

Serial Bit Error Rate Testing under radiation to characterize single particle induced errors in high-speed IC technologies generally involves specialized test equipment common to the telecommunications industry. As bit rates increase, testing is complicated by the rapidly increasing cost of equipment able to test at-speed. Furthermore as rates extend into the tens of billions of bits per second test equipment ceases to be broadband, a distinct disadvantage for exploring SEE mechanisms in the target technologies. In this presentation the authors detail the testing accomplished in the CREST project and apply the knowledge gained to establish a set of guidelines suitable for designing arbitrarily high speed radiation effects tests.