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Hardware results of chaotic time series prediction using cascade error projection algorithmThis paper briefly describes an on-line hardware system based on 16x8x4 cascading neural network architecture.
Document ID
20060031559
Acquisition Source
Jet Propulsion Laboratory
Document Type
Conference Paper
External Source(s)
hdl:2014/12838
Authors
Duong, T. A.
Blaes, B. R.
Date Acquired
August 23, 2013
Publication Date
July 21, 2001
Distribution Limits
Public
Copyright
Other
Keywords
prediction cascade error projection VLSI hardware noise prediction

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