NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Press Enter or click the Search button to begin your search.

Back to Results
Fault-tolerant processing systemA fault-tolerant, fiber optic interconnect, or backplane, which serves as a via for data transfer between modules. Fault tolerance algorithms are embedded in the backplane by dividing the backplane into a read bus and a write bus and placing a redundancy management unit (RMU) between the read bus and the write bus so that all data transmitted by the write bus is subjected to the fault tolerance algorithms before the data is passed for distribution to the read bus. The RMU provides both backplane control and fault tolerance.
Document ID
20080004121
Acquisition Source
Headquarters
Document Type
Other - Patent
Authors
Palumbo, Daniel L.
Date Acquired
August 24, 2013
Publication Date
July 2, 1996
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
Patent Application Number: US-PATENT-APPL-SN-963170
Patent Number: US-PATENT-5,533,188
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
US-PATENT-5,533,188
Patent Application
US-PATENT-APPL-SN-963170
No Preview Available