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Monolithic integrated high-T.sub.c superconductor-semiconductor structureA method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.
Document ID
20080006927
Acquisition Source
Glenn Research Center
Document Type
Other - Patent
Authors
Burns, Michael J.
de la Houssaye, Paul R.
Garcia, Graham A.
Russell, Stephen D.
Clayton, Stanley R.
Barfknecht, Andrew T.
Date Acquired
August 24, 2013
Publication Date
April 18, 2000
Subject Category
Solid-State Physics
Report/Patent Number
Patent Application Number: US-PATENT-APPL-SN-041737
Patent Number: US-PATENT-6,051,846
Funding Number(s)
CONTRACT_GRANT: NAS3-26400
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
US-PATENT-6,051,846
Patent Application
US-PATENT-APPL-SN-041737
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