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Flight Qualified Micro Sun SensorA prototype small, lightweight micro Sun sensor (MSS) has been flight qualified as part of the attitude-determination system of a spacecraft or for Mars surface operations. The MSS has previously been reported at a very early stage of development in NASA Tech Briefs, Vol. 28, No. 1 (January 2004). An MSS is essentially a miniature multiple-pinhole electronic camera combined with digital processing electronics that functions analogously to a sundial. A micromachined mask containing a number of microscopic pinholes is mounted in front of an active-pixel sensor (APS). Electronic circuits for controlling the operation of the APS, readout from the pixel photodetectors, and analog-to-digital conversion are all integrated onto the same chip along with the APS. The digital processing includes computation of the centroids of the pinhole Sun images on the APS. The spacecraft computer has the task of converting the Sun centroids into Sun angles utilizing a calibration polynomial. The micromachined mask comprises a 500-micron-thick silicon wafer, onto which is deposited a 57-nm-thick chromium adhesion- promotion layer followed by a 200-nm-thick gold light-absorption layer. The pinholes, 50 microns in diameter, are formed in the gold layer by photolithography. The chromium layer is thin enough to be penetrable by an amount of Sunlight adequate to form measurable pinhole images. A spacer frame between the mask and the APS maintains a gap of .1 mm between the pinhole plane and the photodetector plane of the APS. To minimize data volume, mass, and power consumption, the digital processing of the APS readouts takes place in a single field-programmable gate array (FPGA). The particular FPGA is a radiation- tolerant unit that contains .32,000 gates. No external memory is used so the FPGA calculates the centroids in real time as pixels are read off the APS with minimal internal memory. To enable the MSS to fit into a small package, the APS, the FPGA, and other components are mounted on a single two-sided board following chip-on-board design practices
Document ID
20100002846
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other - NASA Tech Brief
Authors
Liebe, Carl Christian
(California Inst. of Tech. Pasadena, CA, United States)
Mobasser, Sohrab
(California Inst. of Tech. Pasadena, CA, United States)
Wrigley, Chris
(California Inst. of Tech. Pasadena, CA, United States)
Schroeder, Jeffrey
(California Inst. of Tech. Pasadena, CA, United States)
Bae, Youngsam
(California Inst. of Tech. Pasadena, CA, United States)
Naegle, James
(California Inst. of Tech. Pasadena, CA, United States)
Katanyoutanant, Sunant
(California Inst. of Tech. Pasadena, CA, United States)
Jerebets, Sergei
(California Inst. of Tech. Pasadena, CA, United States)
Schatzel, Donald
(California Inst. of Tech. Pasadena, CA, United States)
Lee, Choonsup
(California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 25, 2013
Publication Date
July 1, 2007
Publication Information
Publication: NASA Tech Briefs, July 2007
Subject Category
Man/System Technology And Life Support
Report/Patent Number
NPO-43620
Distribution Limits
Public
Copyright
Public Use Permitted.
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