Highly Efficient Multilayer Thermoelectric Devices

Multilayer thermoelectric devices now at the prototype stage of development exhibit a combination of desirable characteristics, including high figures of merit and high performance/cost ratios. These devices are capable of producing temperature differences of the order of 50 K in operation at or near room temperature. A solvent-free batch process for mass production of these state-of-the-art thermoelectric devices has also been developed. Like prior thermoelectric devices, the present ones have commercial potential mainly by virtue of their utility as means of controlled cooling (and/or, in some cases, heating) of sensors, integrated circuits, and temperature-critical components of scientific instruments. The advantages of thermoelectric devices for such uses include no need for circulating working fluids through or within the devices, generation of little if any noise, and high reliability. The disadvantages of prior thermoelectric devices include high power consumption and relatively low coefficients of performance. The present development program was undertaken in the hope of reducing the magnitudes of the aforementioned disadvantages and, especially, obtaining higher figures of merit for operation at and near room temperature. Accomplishments of the program thus far include development of an algorithm to estimate the heat extracted by, and the maximum temperature drop produced by, a thermoelectric device; solution of the problem of exchange of heat between a thermoelectric cooler and a water-cooled copper block; retrofitting of a vacuum chamber for depositing materials by sputtering; design of masks; and fabrication of multilayer thermoelectric devices of two different designs, denoted I and II. For both the I and II designs, the thicknesses of layers are of the order of nanometers. In devices of design I, nonconsecutive semiconductor layers are electrically connected in series. Devices of design II contain superlattices comprising alternating electron-acceptor (p)-doped and electron-donor (n)-doped, nanometer- thick semiconductor layers.