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NASA-DoD Lead-Free Electronics ProjectIn response to concerns about risks from lead-free induced faults to high reliability products, NASA has initiated a multi-year project to provide manufacturers and users with data to clarify the risks of lead-free materials in their products. The project will also be of interest to component manufacturers supplying to high reliability markets. The project was launched in November 2006. The primary technical objective of the project is to undertake comprehensive testing to generate information on failure modes/criteria to better understand the reliability of: (1) Packages (e.g., Thin Small Outline Package [TSOP], Ball Grid Array [BGA], Plastic Dual In-line Package [PDIP]) assembled and reworked with solder interconnects consisting of lead-free alloys (2) Packages (e.g., TSOP, BGA, PDIP) assembled and reworked with solder interconnects consisting of mixed alloys, lead component finish/lead-free solder and lead-free component finish/SnPb solder
Document ID
20130012620
Acquisition Source
Kennedy Space Center
Document Type
Presentation
Authors
Kessel, Kurt
(International Trade Bridge, Inc. Cocoa Beach, FL, United States)
Date Acquired
August 27, 2013
Publication Date
November 1, 2009
Subject Category
Metals And Metallic Materials
Report/Patent Number
KSC-2009-275
Report Number: KSC-2009-275
Meeting Information
Meeting: 2009 DMC
Location: Orlando, FL
Country: United States
Start Date: November 30, 2009
End Date: December 3, 2009
Funding Number(s)
CONTRACT_GRANT: NAS10-03029
Distribution Limits
Public
Copyright
Public Use Permitted.
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