NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Back to Results
flight hardware packaging design for stringent emc radiated emission requirementsThis packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.
Document ID
20130013583
Document Type
Other - NASA Tech Brief
Authors
Lortz, Charlene L.
(California Inst. of Tech. Pasadena, CA, United States)
Huang, Chi-Chien N.
(California Inst. of Tech. Pasadena, CA, United States)
Ravich, Joshua A.
(California Inst. of Tech. Pasadena, CA, United States)
Steiner, Carl N.
(California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
August 27, 2013
Publication Date
May 1, 2013
Publication Information
Publication: NASA Tech Briefs, May 2013
Subject Category
Electronics and Electrical Engineering
Report/Patent Number
NPO-48440
Distribution Limits
Public
Copyright
Public Use Permitted.

Available Downloads

NameType 20130013583.pdf STI

Related Records

IDRelationTitle20130013553Analytic PrimaryNASA Tech Briefs, May 2013