NASA Logo

NTRS

NTRS - NASA Technical Reports Server

Due to the lapse in federal government funding, NASA is not updating this website. We sincerely regret this inconvenience.

Back to Results
Reliability of CGA/LGA/HDI Package Board/Assembly (Revision A)This follow-up report presents reliability test results conducted by thermal cycling of five CGA assemblies evaluated under two extreme cycle profiles, representative of use for high-reliability applications. The thermal cycles ranged from a low temperature of 55 C to maximum temperatures of either 100 C or 125 C with slow ramp-up rate (3 C/min) and dwell times of about 15 minutes at the two extremes. Optical photomicrographs that illustrate key inspection findings of up to 200 thermal cycles are presented. Other information presented include an evaluation of the integrity of capacitors on CGA substrate after thermal cycling as well as process evaluation for direct assembly of an LGA onto PCB. The qualification guidelines, which are based on the test results for CGA/LGA/HDI packages and board assemblies, will facilitate NASA projects' use of very dense and newly available FPGA area array packages with known reliably and mitigation risks, allowing greater processing power in a smaller board footprint and lower system weight.
Document ID
20140000666
Acquisition Source
Jet Propulsion Laboratory
Document Type
Other
Authors
Ghaffarian, Reza
(Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
February 11, 2014
Publication Date
January 22, 2013
Subject Category
Quality Assurance And Reliability
Report/Patent Number
JPL-Publ-12-3
Report Number: JPL-Publ-12-3
Funding Number(s)
CONTRACT_GRANT: NAS7-03001
WBS: WBS 724297.40.43
WBS: WBS 104593.40.49.02.02
Distribution Limits
Public
Copyright
Public Use Permitted.
No Preview Available