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Challenges of Developing Qualification Methods for DDR Class DevicesNo abstract available
Document ID
20150006983
Acquisition Source
Jet Propulsion Laboratory
Document Type
Presentation
External Source(s)
hdl:2014/43906
Authors
Guertin, Steven M. (Jet Propulsion Lab., California Inst. of Tech. Pasadena, CA, United States)
Date Acquired
April 30, 2015
Publication Date
June 29, 2011
Subject Category
Electronics And Electrical Engineering
Meeting Information
Meeting: NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop(ETW)
Location: Greenbelt, MD
Country: United States
Start Date: June 28, 2011
End Date: June 30, 2011
Sponsors: NASA Goddard Space Flight Center
Distribution Limits
Public
Copyright
Other
Keywords
cell retention
Double Data Rate 2 (DDR2)
reliability testing
DDR3

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