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New Developments in Error Detection and Correction Strategies for Critical ApplicationsThe presentation will cover a variety of mitigation strategies that were developed for critical applications. An emphasis is placed on strengths and weaknesses per mitigation technique as it pertains to different FPGA device types.
Document ID
20160007971
Acquisition Source
Goddard Space Flight Center
Document Type
Presentation
Authors
Berg, Melanie (ASRC Federal Space and Defense Greenbelt, MD, United States)
LaBel, Ken (NASA Goddard Space Flight Center Greenbelt, MD United States)
Date Acquired
June 28, 2016
Publication Date
May 23, 2016
Subject Category
Electronics And Electrical Engineering
Quality Assurance And Reliability
Report/Patent Number
GSFC-E-DAA-TN32695
Report Number: GSFC-E-DAA-TN32695
Meeting Information
Meeting: 2016 Single Event Effects (SEE) Symposium and Military and Aerospace Programmable Logic Devices (MAPLD) Workshop
Location: San Diego, CA
Country: United States
Start Date: May 23, 2016
End Date: May 26, 2016
Sponsors: See Symposium (Single Event Effects)
Funding Number(s)
CONTRACT_GRANT: NNG13CR48C
Distribution Limits
Public
Copyright
Public Use Permitted.
Keywords
Triple modular redundancy (TMR)
Mitigation
Field programmable gate array (FPGA)
Single Event Effects (SEEs)
Error detection and correction (EDAC)

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