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The Effects of Race Conditions when Implementing Single-Source Redundant Clock Trees in Triple Modular Redundant Synchronous ArchitecturesWe present the challenges that arise when using redundant clock domains due to their clock-skew. Heavy-ion radiation data show that a singular clock domain (DTMR) provides an improved TMR methodology for SRAM-based FPGAs over redundant clocks.
Document ID
20160011393
Acquisition Source
Goddard Space Flight Center
Document Type
Presentation
Authors
Berg, Melanie D. (ASRC Federal Space and Defense Greenbelt, MD, United States)
Label, Kenneth A. (NASA Goddard Space Flight Center Greenbelt, MD United States)
Pellish, Jonathan (NASA Goddard Space Flight Center Greenbelt, MD United States)
Date Acquired
September 21, 2016
Publication Date
September 19, 2016
Subject Category
Electronics And Electrical Engineering
Report/Patent Number
GSFC-E-DAA-TN35422
Report Number: GSFC-E-DAA-TN35422
Meeting Information
Meeting: Radiation Effects on Components and Systems (RADECS) Conference
Location: Bremen
Country: Germany
Start Date: September 19, 2016
End Date: September 23, 2016
Sponsors: Institute of Electrical and Electronics Engineers
Funding Number(s)
CONTRACT_GRANT: NNG13CR48C
Distribution Limits
Public
Copyright
Public Use Permitted.
Keywords
Triple Modular Redundancy (TMR)
Single Event Upset (SEU)
Field Programmable Gate Aray (FPGA)
Clock skew
Xilinx

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