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New Developments in FPGA: SEUs and Fail-Safe Strategies from the NASA Goddard PerspectiveIt has been shown that, when exposed to radiation environments, each Field Programmable Gate Array (FPGA) device has unique error signatures. Subsequently, fail-safe and mitigation strategies will differ per FPGA type. In this session several design approaches for safe systems will be presented. It will also explore the benefits and limitations of several mitigation techniques. The intention of the presentation is to provide information regarding FPGA types, their susceptibilities, and proven fail-safe strategies; so that users can select appropriate mitigation and perform the required trade for system insertion. The presentation will describe three types of FPGA devices and their susceptibilities in radiation environments.
Document ID
20160014713
Acquisition Source
Goddard Space Flight Center
Document Type
Other
Authors
Berg, Melanie D.
(ASRC Federal Space and Defense Greenbelt, MD, United States)
Label, Kenneth A.
(NASA Goddard Space Flight Center Greenbelt, MD United States)
Pellish, Jonathan
(NASA Goddard Space Flight Center Greenbelt, MD United States)
Date Acquired
December 19, 2016
Publication Date
November 30, 2016
Subject Category
Quality Assurance And Reliability
Electronics And Electrical Engineering
Report/Patent Number
GSFC-E-DAA-TN36525
Report Number: GSFC-E-DAA-TN36525
Funding Number(s)
CONTRACT_GRANT: NNG13CR48C
Distribution Limits
Public
Copyright
Public Use Permitted.
Keywords
Error Correction and Detection (EDAC)
Triple Modular Redundancy
hardware description language (HDL)
Field Programmable Gate Array (FPGA)
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