A System to Provide Deterministic Flight Software Operation and Maximize Multicore Processing Performance: The Safe and Precise Landing – Integrated Capabilities Evolution (SPLICE) Datapath

A method and design are described for a system
that processes multiple data streams, utilizing a multicore
asymmetric processing architecture, that eliminates data
interrupts to the application processors. The design supports a
deterministic environment for flight software in NASA’s Safe and
Precise Landing – Integrated Capabilities Evolution (SPLICE)
project. The SPLICE project develops sensor, algorithm, and
compute technologies for Precision Landing and Hazard
Avoidance (PL&HA) capabilities. The compute technology for
SPLICE is the Descent and Landing Computer (DLC). The DLC
hosts several SPLICE algorithms with high computational
resource requirements that must be executed in a real-time and
deterministic manner. The software runs on a custom Single
Board Computer (SBC), with a Xilinx Ultrascale+ Multiprocessor
System-on-a-Chip (MPSoC). Input data for the flight software is
from a variety of sensors, unique with respect to data rate and
packet size. A data path between the SPLICE sensors and
algorithms is designed to efficiently deliver this data to the flight
software using the MPSoC asymmetric processing cores and Field
Programmable Gate Array (FPGA) fabric. This is implemented
in a manner that isolates the application processors running the
flight software from interrupts associated with the input data. By
leveraging real-time processors on the MPSoC, and a structure
with the appropriate interfaces in the shared memory on the SBC,
the flight software can use the full set of application processors.
The available utilization for each processor in this set is also
maximized for the SPLICE applications, providing a sufficiently
deterministic execution environment without the cost and
overhead of a real-time operating system.