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On higher order discrete phase-locked loops.An exact mathematical model is developed for a discrete loop of a general order particularly suitable for digital computation. The deterministic response of the loop to the phase step and the frequency step is investigated. The design of the digital filter for the second-order loop is considered. Use is made of the incremental phase plane to study the phase error behavior of the loop. The model of the noisy loop is derived and the optimization of the loop filter for minimum mean-square error is considered.
Document ID
19730029104
Acquisition Source
Legacy CDMS
Document Type
Reprint (Version printed in journal)
Authors
Gill, G. S.
Gupta, S. C.
(Southern Methodist University Dallas, Tex., United States)
Date Acquired
August 7, 2013
Publication Date
September 1, 1972
Publication Information
Publication: IEEE Transactions on Aerospace and Electronic Systems
Volume: AES-8
Subject Category
Communications
Accession Number
73A13906
Distribution Limits
Public
Copyright
Other

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