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Selective data segment monitoring systemHigh speed data monitoring apparatus is described for displaying the bit pattern of a selected portion of a block of transmitted data comprising a shift register for receiving the transmitted data and for temporarily containing the consecutive data bits. A programmable sync detector for monitoring the contents of the shift register and for generating a sync signal when the shift register contains a predetermined sync code is included. A counter is described for counting the data bits input to the shift register after the sync signal is generated and for generating a count complete signal when a selected number of data bits have been input to the register. A data storage device is used for storing the contents of the shift register at the time the count complete signal is generated.
Document ID
19770012816
Acquisition Source
Legacy CDMS
Document Type
Other - Patent
Authors
Wirth, M. N.
(NASA Ames Research Center Moffett Field, CA, United States)
Date Acquired
August 8, 2013
Publication Date
November 2, 1976
Subject Category
Computer Operations And Hardware
Accession Number
77N19760
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.
Patent
US-PATENT-3,990,049|NASA-CASE-ARC-10899-1
Patent Application
US-PATENT-APPL-SN-576774
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