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The realization of arithmetic processors for delta modulation encoded signalsThe design and realization of digital devices which add or multiply delta modulation (DM) encoded signals are presented. These systems operate directly on the DM bit stream. It is shown that the devices can be constructed using standard digital hardware and that the hardware complexity needed to add or multiply the two DM encoded signals is equivalent to that needed for pulse code modulation (PCM) signals. Experimental results are presented showing the operation of these systems. The results obtained by adding or multiplying DM encoded signals are compared with those obtained using PCM encoded signals on the basis of signal-to-noise ratio (SNR). A spectral-analysis technique applicable to a DM encoded signal is developed to obtain SNR curves.
Document ID
19770032322
Acquisition Source
Legacy CDMS
Document Type
Conference Proceedings
Authors
Locicero, J. L.
(City Coll. of the City Univ. of New York NY, United States)
Garodnick, J.
(City Coll. of the City Univ. of New York NY, United States)
Schilling, D. L.
(City College New York, N.Y., United States)
Date Acquired
August 9, 2013
Publication Date
January 1, 1975
Subject Category
Communications And Radar
Meeting Information
Meeting: National Telecommunications Conference
Location: New Orleans, LA
Start Date: December 1, 1975
End Date: December 3, 1975
Accession Number
77A15174
Funding Number(s)
CONTRACT_GRANT: NAS9-13940
CONTRACT_GRANT: NSG-5013
Distribution Limits
Public
Copyright
Other

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