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hep - a semaphore-synchronized multiprocessor with central controlThe paper describes the design concept of the Heterogeneous Element Processor (HEP), a system tailored to the special needs of scientific simulation. In order to achieve high-speed computation required by simulation, HEP features a hierarchy of processes executing in parallel on a number of processors, with synchronization being largely accomplished by hardware. A full-empty-reserve scheme of synchronization is realized by zero-one-valued hardware semaphores. A typical system has, besides the control computer and the scheduler, an algebraic module, a memory module, a first-in first-out (FIFO) module, an integrator module, and an I/O module. The architecture of the scheduler and the algebraic module is examined in detail.
Document ID
19770041725
Document Type
Conference Proceedings
Authors
Gilliland, M. C.
(Denelcor, Inc. Denver, Colo., United States)
Smith, B. J.
(Colorado, University Boulder, Colo., United States)
Calvert, W.
(Colorado Univ. Boulder, CO, United States)
Date Acquired
August 8, 2013
Publication Date
January 1, 1976
Subject Category
COMPUTER OPERATIONS AND HARDWARE
Meeting Information
Summer Computer Simulation Conference(Washington, DC)
Distribution Limits
Public
Copyright
Other