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Linking "Smart" Modules by a Single ChannelSystem architecture brings order to potentially chaotic situation. New configuration allows many "smart" modules (each containing memory and microprocessor) to be linked by common data channel. Architecture allows each module to carry on operations at own data rate within block of time, while communications between modules occur in strict synchronism.
Document ID
19830000134
Acquisition Source
Legacy CDMS
Document Type
Other - NASA Tech Brief
Authors
Kohl, W. H. (CALTECH)
Date Acquired
August 11, 2013
Publication Date
October 1, 1983
Publication Information
Publication: NASA Tech Briefs
Volume: 7
Issue: 4
ISSN: 0145-319X
Subject Category
Electronic Systems
Report/Patent Number
NPO-15342
Accession Number
83B10134
Distribution Limits
Public
Copyright
Work of the US Gov. Public Use Permitted.

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